| Description | This Power MOSFET is produced using advanced planar stripe DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well sui... |
| Features |
• 10.5A, 400V, RDS(on) = 0.55Ω @VGS = 10 V • Low gate charge ( typical 30nC) • Fast switching • 100% avalanche tested • Improved dv/dt capability Ordering Information PART NUMBER PACKAGE BRAND 740 TO-220 0GFD www.goford.cn TEL：0755-86350980 FAX：0755-86350963 740 Absolute Maximum Ratings TC = 25°Cunless otherwise noted Symbol Parameter 740 740F VDSS ID Drain-Source Voltage Drain Current - Continuous (TC = 25°C) - Continuous (TC = 100°C) 400 10.5 6.6 10.5 6.6 IDM Drain Current- Pulsed (Note 1) 42 42 VGSS Gate-Source Voltage ± 30 EAS Single Pulsed Avalanche Energy (Note... |
| Datasheet |
 740 Datasheet - 415.95KB |
| Part Number | Description |
|---|---|
 SEMTECH |
3-Terminal positive voltage regulator ST 78L05U (SOT-89) 3-Terminal Positive Voltage Regulator Absolute Maximum Ratings (Ta = 25 OC) Parameter Symbol Input Voltage VI Power Dissipation Ptot Operating Temperature Topr Storage Temperature Range Ts 1) 15 mm X 25 mm X 0.7 mm alumina ceramic board, Ta ≤ 25 OC Rating 30 800 1) -20~120 -55~150 Unit V mW OC OC Electrical Characteristics (Ta = 25 OC) (Unless otherwise specified, 0 OC ≦TJ ≦125 OC, VI = 10 V, IO = 40 mA, CI = 0.33 µF, CO = 0.1 µF) Parameter Symbol Test Condition Min. Typ. Max. Output Voltage VO Tj = 25 OC 4.8 5 5.2 7 V ≦ Vi ≦ 20 V, IO = 1 mA – 40 mA 4.75 - 5.25 7V ≦Vi ≦ V MAX., IO = 1 mA – 70 mA 4.75 - 5.25 Load Regulation ∆VO IO = 1 mA – 100 mA, ... |
 National Semiconductor |
16-Bit D Flip-Flop The ’ACTQ16374 contains sixteen non-inverting D flip-flops with TRI-STATE outputs and is intended for bus oriented applications The device is byte controlled A buffered clock (CP) and Output Enable (OE) are common to each byte and can be shorted together for full 16-bit operation The ’ACTQ16245 utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance FACT Quiet SeriesTM features GTOTM output control for superior performance Features Y Utilizes NSC FACT Quiet Series technology Y Guaranteed simultaneous switching noise level and dynamic threshold performance Y Guaranteed pin-to-pin output skew Y Buffered Positive edge-triggered clock ... |
National Semiconductor |
16-Bit Transceiver/Register The ’ACTQ16646 contains sixteen non-inverting bidirectional registered bus transceivers providing multiplexed transmission of data directly from the input bus or from the internal storage registers Each byte has separate control inputs which can be shorted together for full 16-bit operation The DIR inputs determine the direction of data flow through the device The CPAB and CPBA inputs load data into the registers on the LOW-to-HIGH transition The ’ACTQ16646 utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance FACT Quiet SeriesTM features GTOTM output control and undershoot corrector for superior performance Features Y Utilizes N... |
 STMicroelectronics |
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER The 74LCXH16245 is a low voltage CMOS 16 BIT BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. This IC is intended for two-way asynchronous c... |
 Texas Instruments |
Positive-Voltage Linear Regulators The UA78L00 series of fixed-voltage linear regulators is designed for a wide range of applications. These applications include on-card regulation for elimination of noise and distribution problems associated with single-point regulation as well as for voltage regulation in major appliances. In addition, they can be used with power-pass elements to make highcurrent voltage regulators. One of these regulators can deliver up to 100 mA of output current. The internal limiting and thermal-shutdown features of these regulators help to protect the device from overload. The UA78L00C and UA78L00AC series devices are characterized for operation over the virtual junction temperature range of 0°C to 125... |
 NXP |
Octal latched transceiver The 74ABT544 high performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT544 octal latched transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch enable (LEAB, LEBA) and output enable (OEAB, OEBA) inputs are provided for each register to permit independent control of data transfer in either direction. The outputs are guaranteed to sink 64 mA. 2. Features and benefits Combines 74ABT640 and 74ABT373 type functions in one device 8-bit octal transceiver with D-type latch Back-to-back registers for storage Separate controls for data flow in each directi... |
 nexperia |
Octal buffer/line driver The 74ABT244 is an 8-bit buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 4.5 to 5.5 V • Octal bus interface • 3-State buffers • BiCMOS high speed and output drive • Output capability: +64 mA/–32 mA • D... |
NXP |
Octal latched transceiver The 74ABT543A high performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT543A octal registered transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch enable (LEAB, LEBA) and output enable (OEAB, OEBA) inputs are provided for each register to permit independent control of data transfer in either direction. The outputs are guaranteed to sink 64 mA. 2. Features and benefits Combines 74ABT245 and 74ABT373 type functions in one device 8-bit octal transceiver with D-type latch Back-to-back registers for storage Separate controls for data flow in each di... |
NXP |
Octal latched transceiver The 74ABT544 high performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT544 octal latched transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch enable (LEAB, LEBA) and output enable (OEAB, OEBA) inputs are provided for each register to permit independent control of data transfer in either direction. The outputs are guaranteed to sink 64 mA. 2. Features and benefits Combines 74ABT640 and 74ABT373 type functions in one device 8-bit octal transceiver with D-type latch Back-to-back registers for storage Separate controls for data flow in each directi... |
nexperia |
Quad 2-input OR gate The 74ABT32 is a quad 2-input OR gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 4.5 V to 5.5 V • BiCMOS high speed and output drive • Direct interface with TTL levels • IOFF circuitry provides partial Power-down mode operation • Latch-up protection exceeds 500 mA per JESD78B class II level A • ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • Specified from -40 °C to +85 °C 3. Ordering information Table 1. Ordering information Typ... |
nexperia |
Octal transceiver The 74ABT245 is an 8-bit transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Octal bidirectional bus interface • 3-State buffers • Supply voltage range from 4.5 to 5.5 V • BiCMOS high speed and output drive • Direct interface with TTL levels • Output capability: +64 mA/–32 mA • Power-up 3-State • Live insertion/ext... |
nexperia |
Octal buffer/line driver The 74ABT244 is an 8-bit buffer/line driver with 3-state outputs. The device can be used as two 4-bit buffers or one 8-bit buffer. The device features two output enables (1OE and 2OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 4.5 to 5.5 V • Octal bus interface • 3-State buffers • BiCMOS high speed and output drive • Output capability: +64 mA/–32 mA • D... |
nexperia |
Dual 4-input NAND gate The 74ABT20 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT20 is a dual 4-input NAND gate. 2. Features and benefits Latch-up protection exceeds 500 mA per JESD78B class II level A ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description 74ABT20D 40 C to +85 C SO14 plastic small outline package; 14 leads; body width 3.9 mm 74ABT20DB 40 C to +85 C SSOP14 plastic shrink small outline package; 14 leads... |
nexperia |
16-bit bus transceiver The 74ABT16245B is a 16-bit transceiver with 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. The device features two output enables (1OE and 2OE) each controlling eight outputs, and two send/receive (1DIR and 2DIR) inputs for direction control. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 4.5 to 5.5 V • BiCMOS high speed and output drive • Direct interface ... |
nexperia |
Quad buffer The 74ABT125 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 4.5 V to 5.5 V • BiCMOS high speed and output drive • Direct interface with TTL levels • Power-up 3-state • Inputs are disabled during 3-state mode • IOFF circuitry provides partial Power-down mode operation • Latch-up protection exceeds 500 mA per J... |
nexperia |
Dual D-type flip-flop The 74ABT74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 4.5 V to 5.5 V • BiCMOS high speed and output drive • Direct interface with TTL levels • Power-up... |
nexperia |
Dual D-type flip-flop The 74ABT74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Supply voltage range from 4.5 V to 5.5 V • BiCMOS high speed and output drive • Direct interface with TTL levels • Power-up... |